Suppose we have a project for the FPGA in the Altera development environment Quartus II. Let’s do a software simulation: let us apply to the inputs of the FPGA some signal and see what will be its outputs. For this we use a built-in Simulation Waveform Editor tool.
You will need
- — Personal computer;
- — installed the development environment Quartus II.
1. First run the Quartus II IDE and open the project. Now create a new file. Press the key combination Ctrl+N or via menu File -> New…. In the opened window choose file type — University Program VWF.
2. The tool starts Simulation Waveform Editor. Immediately save this file, still empty, under an arbitrary name in the project folder: Ctrl+S (or File -> Save). I’ll name the file «data_test.vwf», because I will submit the data to the FPGA output called «DATA».
Now we need to add our tyres. Go to menu Edit -> Insert -> Insert Node or Bus…. Window opens «Insert node or Bus», where we click on Node Finder… to search for available tires in the FPGA project.
3. In the search box of the nodes in the Node Finder, click List (the list). In the left part of the window will display the list of found nodes and tyres of the project. To select a add them in right margin by clicking the appropriate button. Or add all at once by pressing the «> > » button. Confirm your selection by pressing the «OK» button. In the «Insert Node or Bus» also click «OK».
4. In the form window pulses have appeared diagrams of the signal levels of the selected findings. Moreover, the level of the input signals CLK and DATA while equal to logical zero and the output level is not defined. Need to ask their form.
5. But first you need to set the timing parameters to be used in Simulation Waveform Editor simulating. In the menu Edit -> Grid Size… , set the step time grid. And in the menu Edit -> Set End Time… specify the duration of the simulation.
6. We will set the parameters of the clock pulse. Select in the left margin of the desired signal by name by clicking on it with the left mouse button. Now go to menu: Edit -> Value -> Overwrite Clock… In the opened window, Clock set period (Period), phase (Offset) and duty cycle (Duty cycle) of the clock pulse.
7. We will set the signal waveform Data. Select it and in menu: Edit> Value select the appropriate type. I will choose randomly changing signal Random Values… and set its parameters in the window.
After that save the settings (Ctrl+S).
8. You can now run a functional simulation: Simulation> Run Functional Simulation , or click the button on the menu bar. Quartus will conduct a simulation and display the result in a new window Simulation Waveform Editor.
9. In the opened window you can see calculated output signals of the pins of the FPGA, which was the result of the simulation the Simulation Waveform Editor utility.